The 520DARS-W provides a compact method extracting word clock from your AES digital audio reference signals. The 520DARS-W features one auto-equalized input with 4 word clock outputs and 5 reclocked AES audio outputs.
The 520DARS-W can be used in conjunction with the 5600MSC Master Clock/SPG system.
The 520DARS-W is housed in the 3RU 500FR
frame that will hold up to 16 modules.
Features
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Block Diagram
Specifications
| AES Input | |
|---|---|
| Standard | SMPTE 276M |
| Number of Inputs | 1 |
| Connector | BNC per IEC 61169-8 Annex A |
| Level | 1V p-p |
| Coupling | Transformer |
| Impedance | 75Ω |
| Return Loss | > 25dB, 100kHz to 6MHz |
| Equalization | Automatic to 1500m with Belden 1694A (or equivalent) @ 48kHz AES signal |
| Sampling Frequency | 32kHz, 44.1kHz, 48kHz and 96kHz |
| AES Output | |
|---|---|
| Number of Outputs | 5 |
| Type | Unbalanced AES |
| Connector | BNC per IEC 61169-8 Annex A |
| Level | 1V p-p |
| Impedance | 75Ω |
| Return Loss | > 25dB, 100kHz to 6MHz |
| Word Clock Output | |
|---|---|
| Standard | AES11-2003 |
| Number of Outputs | 4 |
| Connector | BNC per IEC 61169-8 Annex A |
| Level | 5V p-p square wave (0-5V) ±0.5V |
| Electrical | |
|---|---|
| Voltage | +12V DC |
| Power | 5 Watts |
| EMI/RFI | Complies with FCC Part 15 Class A, EU EMC Directive |
| Physical | |
|---|---|
| Number of Slots | 1 |


Layout Tool
